IRIS Institutional Research Information System

Griggio, Alberto
 Distribuzione geografica
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Continente #
EU - Europa 6.134
NA - Nord America 5.193
AS - Asia 3.009
SA - Sud America 729
AF - Africa 73
Continente sconosciuto - Info sul continente non disponibili 10
OC - Oceania 3
Totale 15.151
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Nazione #
US - Stati Uniti d'America 5.008
RU - Federazione Russa 3.755
SG - Singapore 981
CN - Cina 607
BR - Brasile 602
VN - Vietnam 593
DE - Germania 581
IT - Italia 457
HK - Hong Kong 365
UA - Ucraina 220
SE - Svezia 219
FR - Francia 181
GB - Regno Unito 160
FI - Finlandia 149
IN - India 148
NL - Olanda 114
IE - Irlanda 104
CA - Canada 95
MX - Messico 62
AR - Argentina 48
BE - Belgio 47
BD - Bangladesh 44
PL - Polonia 43
JP - Giappone 41
IQ - Iraq 32
TR - Turchia 31
ZA - Sudafrica 25
ES - Italia 23
EC - Ecuador 19
CO - Colombia 16
AT - Austria 15
IL - Israele 15
VE - Venezuela 15
PK - Pakistan 14
ID - Indonesia 12
LT - Lituania 12
UZ - Uzbekistan 12
LB - Libano 11
NP - Nepal 11
TN - Tunisia 11
EU - Europa 10
HU - Ungheria 10
MA - Marocco 9
MY - Malesia 9
PH - Filippine 9
SA - Arabia Saudita 9
AZ - Azerbaigian 8
CL - Cile 8
DK - Danimarca 8
EG - Egitto 8
JO - Giordania 8
CR - Costa Rica 7
GR - Grecia 7
KR - Corea 7
PY - Paraguay 7
AE - Emirati Arabi Uniti 6
DZ - Algeria 6
EE - Estonia 5
OM - Oman 5
PE - Perù 5
TH - Thailandia 5
TT - Trinidad e Tobago 5
CH - Svizzera 4
KE - Kenya 4
KZ - Kazakistan 4
PA - Panama 4
SI - Slovenia 4
SY - Repubblica araba siriana 4
UY - Uruguay 4
AU - Australia 3
BH - Bahrain 3
BY - Bielorussia 3
GE - Georgia 3
IR - Iran 3
JM - Giamaica 3
LK - Sri Lanka 3
PT - Portogallo 3
TW - Taiwan 3
BO - Bolivia 2
CI - Costa d'Avorio 2
CZ - Repubblica Ceca 2
DO - Repubblica Dominicana 2
GY - Guiana 2
LV - Lettonia 2
MU - Mauritius 2
NG - Nigeria 2
NI - Nicaragua 2
AL - Albania 1
AM - Armenia 1
BA - Bosnia-Erzegovina 1
BB - Barbados 1
BF - Burkina Faso 1
BG - Bulgaria 1
BS - Bahamas 1
ET - Etiopia 1
HN - Honduras 1
KW - Kuwait 1
LC - Santa Lucia 1
MK - Macedonia 1
PS - Palestinian Territory 1
Totale 15.145
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Città #
San Jose 654
Chandler 516
Singapore 490
Ashburn 404
Jacksonville 404
Hong Kong 336
Council Bluffs 318
Dallas 245
Moscow 244
Beijing 197
Los Angeles 171
Ho Chi Minh City 169
Trento 169
The Dalles 168
Boardman 158
Hanoi 148
Wilmington 120
Dublin 103
Hefei 97
New York 96
Helsinki 93
Lauterbourg 81
Kronberg 78
Ann Arbor 71
Dong Ket 60
Dearborn 57
Brooklyn 56
São Paulo 51
Woodbridge 46
Milan 43
Santa Clara 40
Brussels 39
Nuremberg 37
Munich 35
Shanghai 35
Phoenix 33
Denver 32
Warsaw 32
Houston 31
Falkenstein 30
Montreal 29
Frankfurt am Main 28
Seattle 28
Atlanta 26
Guangzhou 26
Da Nang 25
Tokyo 25
Poplar 24
Pune 23
Redwood City 23
Haiphong 22
London 22
Amsterdam 20
Ottawa 20
Stockholm 20
Des Moines 19
Manchester 19
Assago 18
Chicago 18
Orem 18
Toronto 16
Verona 16
Pergine Valsugana 15
Rio de Janeiro 15
Baghdad 14
Belo Horizonte 14
Hải Dương 14
Mexico City 14
Tianjin 14
Chennai 13
Naples 13
Boston 12
Buffalo 12
Johannesburg 12
Miami 12
Columbus 11
Hanover 11
Mountain View 11
Querétaro 11
Tashkent 11
Ankara 10
Turku 10
Vienna 10
San Francisco 9
Brasília 8
Can Tho 8
Curitiba 8
Falls Church 8
Joinville 8
New Delhi 8
Thái Nguyên 8
Amman 7
Budapest 7
Goiânia 7
Mumbai 7
Quito 7
Redmond 7
Rome 7
Aachen 6
Baku 6
Totale 7.057
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Nome #
SMT-Based Satisfiability of First-Order LTL with Event Freezing Functions and Metric Operators 347
Extending nuXmv with Timed Transition Systems and Timed Temporal Properties 299
A Model-Based Approach to the Design, Verification and Deployment of Railway Interlocking System 234
A Modular Approach to MaxSAT Modulo Theories 230
The xSAP Safety Analysis Platform 223
Efficient Anytime Techniques for Model-Based Safety Analysis 223
Certifying Proofs for LTL Model Checking 218
Delayed Theory Combination vs. Nelson-Oppen for Satisfiability Modulo Theories: a Comparative Analysis. Extended version 215
An Abstract Interpretation of DPLL(T)Verification, Model Checking, and Abstract Interpretation 214
Incremental Linearization for Satisfiability and Verification Modulo Nonlinear Arithmetic and Transcendental Functions 213
Satisfiability Modulo Transcendental Functions via Incremental Linearization 209
KRATOS 204
A Lazy and Layered SMT ({BV}) Solver for Hard Industrial Verification Problems 203
Certifying proofs for SAT-based model checking 203
Verilog2SMV: A Tool for Word-level Verification 190
A Formal IDE for Railways: Research Challenges 187
Efficient Analysis of Cyclic Redundancy Architectures via Boolean Fault Propagation 187
A comprehensive framework for the analysis of automotive systems 186
A Simple and Flexible Way of Computing Small Unsatisfiable Cores in SAT Modulo Theories 186
HYCOMP - an SMT-based model checker for hybrid systems 185
Infinite-state invariant checking with IC3 and predicate abstraction 185
Symbolic execution with existential second-order constraints 181
Experimenting on Solving Nonlinear Integer Arithmetic with Incremental Linearization 180
MathSAT 176
Invariant Checking of NRA Transition Systems via Incremental Reduction to LRA with EUF 176
Automatic Generation of Scenarios for System-level Simulation-based Verification of Autonomous Driving Systems 175
IC3 Modulo Theories via Implicit Predicate Abstraction 175
Incremental Linearization: A practical approach to Satisfiability Modulo Nonlinear Arithmetic and Transcendental Functions 175
COMPASTA = COMPASS + TASTE 175
Efficient Generation of Craig Interpolants in Satisfiability Modulo Theories 174
Kratos - A Software Model Checker for SystemC 174
Delayed Theory Combination vs. Nelson-Oppen for Satisfiability Modulo Theories: a Comparative Analysis 173
Automated Parameterized Verification of a Railway Protection System with Dafny 172
Parameter Synthesis with IC3 172
A Practical Approach to Satisability Modulo Linear Integer Arithmetic 171
The nuXmv Symbolic Model Checker 171
Broadening the Scope of SMT-COMP: the Application Track 170
Computing Small Unsatisfiable Cores in Satisfiability Modulo Theories 169
Towards Pareto-Optimal Parameter Synthesis for Monotonic Cost Functions 168
The MathSAT 4SMT Solver 167
COMPASTA: Extending TASTE with Formal Design and Verification Functionality 163
Deciding Floating-Point Logic with Systematic Abstraction 163
Safe Decomposition of Startup Requirements: Verification and Synthesis 162
Comparing Different Variants of the IC3 Algorithm for Hardware Model Checking 161
Software Model Checking via Large-Block Encoding 160
Interpolation-Based Verification of Floating-Point Programs with Abstract CDCL 156
Automatic Discovery of Fair Paths in Infinite-State Transition Systems 155
Infinite-State Liveness-to-Safety via Implicit Abstraction and Well-Founded Relations 155
Efficient SMT-Based Analysis of Failure Propagation 154
Efficient generation of craig interpolants in satisfiability modulo theories 153
Avoiding the Shoals - A New Approach to Liveness Checking 151
System-level simulation-based verification of Autonomous Driving Systems with the VIVAS framework and CARLA simulator 151
Interpolant Generation for UTVPI 149
COMPASTA: Integrating COMPASS Functionality into TASTE 148
Satisfiability checking and symbolic computation 147
To Ackermann-ize or not to Ackermann-ize? On Efficiently Handling Uninterpreted Function Symbols in SMT(EUF U T) 146
Analysis of Cyclic Fault Propagation via ASP 145
Another Look at LTL Modulo Theory over Finite and Infinite Traces 144
Verification of SMT Systems with Quantifiers 141
Preface to special issue on satisfiability modulo theories 141
Optimization Modulo Non-linear Arithmetic via Incremental Linearization 141
Satisfiability Modulo the Theory of Costs: Foundations and Applications 140
Efficient Interpolant Generation in Satisfiability Modulo Theories 137
Combining Symbolic Execution with Predicate Abstraction and CEGAR 137
Kratos2: an SMT-Based Model Checker for Imperative Programs 136
Effective word-level interpolation for software verification 134
Searching for i-Good Lemmas to Accelerate Safety Model Checking 134
LTL falsification in infinite-state systems 131
SC^2: Satisfiability Checking Meets Symbolic Computation 131
Invariant Checking for SMT-based Systems with Quantifiers 130
Tighter Integration of BDD and SMT for Predicate Abstraction 130
Towards the verification of a generic interlocking logic: Dafny meets parameterized model checking 128
Symbolic computation and satisfiability checking 128
Proving the Existence of Fair Paths in Infinite-State Systems 128
Handling Polynomial and Transcendental Functions in SMT via Unconstrained Optimisation and Topological Degree Test 127
Deciding floating-point logic with abstract conflict driven clause learning 127
Leveraging Contracts for Failure Monitoring and Identification in Automated Driving Systems 124
The MathSAT5 SMT Solver 123
Efficient Interpolant Generation in Satisfiability Modulo Linear Integer Arithmetic 122
Efficient Interpolant Generation in Satisfiability Modulo Linear Integer Arithmetic 119
Counterexample-Guided Prophecy for Model Checking Modulo the Theory of Arrays 118
Optimizing Monitoring Requirements in Self-adaptive Systems 116
Verifying LTL Properties of Hybrid Systems with K-Liveness 116
Software Model Checking via IC3 116
Counterexample-Guided Prophecy for Model Checking Modulo the Theory of Arrays 116
Towards Formal Design of FDIR Components with AI 115
Universal Invariant Checking of Parametric Systems with Quantifier-free SMT Reasoning 115
New Perspectives in Symbolic Computation and Satisfiability Checking (Dagstuhl Seminar 22072) 114
Stochastic Local Search for SMT: Combining Theory Solvers with WalkSAT 112
Software Model Checking via Large-Block Encoding 112
EVA: a Tool for the Compositional Verification of AUTOSAR Models 109
Towards Verification Modulo Theories of asynchronous systems via abstraction refinement 102
Towards Safe Autonomous Driving: Model Checking a Behavior Planner during Development 101
Implicit Semi-Algebraic Abstraction for Polynomial Dynamical Systems 94
Reconstructing the High-Level Structure of Legacy Code via Software Model Checking: An Experience Report 93
The VMT-LIB Language and Tools 88
A Theorem Prover Based Approach for SAT-Based Model Checking Certification 35
Formal Analysis of a Railway Signaling Block Designed in AIDA 32
Verification Modulo Theories 26
Certifying rlive: A New Proof Strategy for Liveness Model Checking 23
Totale 15.340
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Categoria #
all - tutte 60.917
article - articoli 0
book - libri 0
conference - conferenze 0
curatela - curatele 0
other - altro 0
patent - brevetti 0
selected - selezionate 0
volume - volumi 0
Totale 60.917
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Totale Lug Ago Sett Ott Nov Dic Gen Feb Mar Apr Mag Giu
2020/202195 0 0 0 0 0 0 0 0 0 0 0 95
2021/2022488 22 10 16 67 31 12 9 98 34 23 61 105
2022/20231.062 35 99 28 165 45 151 27 93 230 84 53 52
2023/2024975 55 34 97 86 64 161 34 111 66 125 4 138
2024/20252.857 18 34 171 106 62 90 210 194 1.088 310 401 173
2025/20268.035 266 464 494 654 368 312 1.126 2.889 500 459 424 79
Totale 15.397