Development and wafer-level characterization of the first production of DC-RSD sensors at FBK

DC-RSDs are silicon sensors that aim to provide a time resolution for minimum ionizing particles in the order of 30 ps and a spatial resolution of a few percent of the pixel pitch. This performance is enabled by internal charge multiplication and resistive charge division between the electrodes. The time resolution is expected to be the same as Low Gain Avalanche Diodes (LGADs). The performance of the resistive charge division mechanism was demonstrated in AC-LGADs or Resistive Silicon Detectors (RSD) where a capacitive coupling between readout electrodes and resistive layer was employed. DC-RSDs use a direct coupling between the electrodes and the resistive layer avoiding the bipolar signal of the AC-coupled designs and providing a better bias distribution to the resistive layer. The channel segmentation does not rely on interrupting the gain layer, aiming to maintain a fill factor close to 100%. The first DC-RSD sensor batch was fabricated at FBK with the aim to demonstrate the soundness of the sensor concept. This batch contains design variations of the sensors, trench isolation between channels to provide signal confinement on the resistive layer, and techniques to lower the contact resistance between readout electrodes and resistive layer. This paper summarizes the characterization of the sensors performed at wafer level.