A surface potential-model based parameter extraction of Si–Ge-pocket n-TFET

This paper presents an algorithm based approach for TFET (Tunnel Field Effect Transistor) design. A numerous number of meta-heuristic algorithms have been used to procure the best device dimension for a Si–Ge (Silicon–Germanium) pocket n-TFET. The foremost important task is to find an alternative to hit and trails based device optimization and thereby improve the device performance by using those techniques. The algorithm based approach requires an objective function. The surface potential based models efficiently represents the device physical properties, thus surface potential based model is used as an objective function. The impact of the channel length, of the Si–Ge layer and device thickness, as well as of oxide thickness are studied by considering them as design variables. The design process involves simulating and validating the obtained dimensions in Technology Computer Aided Design (TCAD). State of art techniques are being outperformed by this algorithmic approach and out of all applied algorithms the Human Behavior Particle Swarm Optimization algorithm (HBPSO) is more accurate. An ON-current of 4.8 × 10–4 A and OFF-current of 4.8 × 10–12 A is achieved by optimizing the structure.