We report on the development of a radiation-detector compatible JFET technology on high-resistivity silicon for monolithic integration of detectors and front-end electronics. A dedicated test-chip containing JFET`s, PIN detectors, and other test-structures has been designed and fabricated for process and device characterization. Results from the electrical characterization of a first fabrication run show that good values of detector leakage current (in the order of 1nA/cm$^2$ at 100 $\mu$m depletion width) can be obtained in spite of the relatively high thermal budget characterizing the process. As far as the JFET performance is concerned, a problem of insufficient device isolation at high substrate voltages has been evidenced. A second run is currently being carried on with the aim of optimizing the JFET structure.

Development of a Detector-Compatible JFET Technology on High-Resistivity Silicon

Dalla Betta, Gian Franco;Boscardin, Maurizio;Ferrario, Lorenza;Zen, Mario;Soncini, Giovanni
1998-01-01

Abstract

We report on the development of a radiation-detector compatible JFET technology on high-resistivity silicon for monolithic integration of detectors and front-end electronics. A dedicated test-chip containing JFET`s, PIN detectors, and other test-structures has been designed and fabricated for process and device characterization. Results from the electrical characterization of a first fabrication run show that good values of detector leakage current (in the order of 1nA/cm$^2$ at 100 $\mu$m depletion width) can be obtained in spite of the relatively high thermal budget characterizing the process. As far as the JFET performance is concerned, a problem of insufficient device isolation at high substrate voltages has been evidenced. A second run is currently being carried on with the aim of optimizing the JFET structure.
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/11582/1406
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