In this work we present a reconfigurable impedance matching network for a CMOS Power Amplifier (PA), implemented in MEMS technology. The matching network is based on cascaded LC stages and is synthesized in order to match the PA optimum output load to 50 Ω at 900 MHz and 1.8 GHz. The MEMS network is implemented in two different ways, both employing switch based variable capacitors and inductors. The technology relies on a surface micromachining process available at the Bruno Kessler Foundation (FBK) in Trento, Italy.
Reconfigurable RF MEMS Based Impedance Matching Network for a CMOS Power Amplifier
Iannacci, Jacopo;Margesin, Benno;Giacomozzi, Flavio;
2009-01-01
Abstract
In this work we present a reconfigurable impedance matching network for a CMOS Power Amplifier (PA), implemented in MEMS technology. The matching network is based on cascaded LC stages and is synthesized in order to match the PA optimum output load to 50 Ω at 900 MHz and 1.8 GHz. The MEMS network is implemented in two different ways, both employing switch based variable capacitors and inductors. The technology relies on a surface micromachining process available at the Bruno Kessler Foundation (FBK) in Trento, Italy.File in questo prodotto:
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