The implementation of single-photon avalanche diode detectors (SPAD) in a standard high voltage 0.7-μm CMOS technology is presented. Two different device structures, combined with integrated quenching circuits, have been fabricated and successfully tested. A novel biasing scheme is proposed allowing the reduction of afterpulsing effect and the decrease of minimum device-to-device distance. Good noise performance is obtained for the 100μm2 active area device where over 50% of the population has a dark count rate below 100cps and afterpulsing lower than 0.3% with a 4-V excess bias and a 32-ns dead time. The peak photon detection probability is about 30%, while the overall system, upper limit, for the time resolution is 144ps.
Low-noise CMOS single-photon avalanche diodes with 32ns dead time
Pancheri, Lucio;Stoppa, David
2007-01-01
Abstract
The implementation of single-photon avalanche diode detectors (SPAD) in a standard high voltage 0.7-μm CMOS technology is presented. Two different device structures, combined with integrated quenching circuits, have been fabricated and successfully tested. A novel biasing scheme is proposed allowing the reduction of afterpulsing effect and the decrease of minimum device-to-device distance. Good noise performance is obtained for the 100μm2 active area device where over 50% of the population has a dark count rate below 100cps and afterpulsing lower than 0.3% with a 4-V excess bias and a 32-ns dead time. The peak photon detection probability is about 30%, while the overall system, upper limit, for the time resolution is 144ps.I documenti in IRIS sono protetti da copyright e tutti i diritti sono riservati, salvo diversa indicazione.
