In this paper, a novel image sensor architecture based on a clock-less readout is presented. The proposed proof-of-concept consists of only 12x6 pixels and validates the new readout scheme designed for low power application, which is particularly suitable for embedding energy harvesting circuit even though not included into the design. Thanks to the clock-less serial readout with embedded PWM interface, the sensor delivers still images at maximum 1Kfps showing a dynamic range of at least 72 dB. A typical value of power consumption of the entire array is estimated about 35nW at 1.6V of power supply.
A Clock-Less PWM Architecture for Sensor Imaging
Nicola, Massari
;Massimo, Gottardi;
2017-01-01
Abstract
In this paper, a novel image sensor architecture based on a clock-less readout is presented. The proposed proof-of-concept consists of only 12x6 pixels and validates the new readout scheme designed for low power application, which is particularly suitable for embedding energy harvesting circuit even though not included into the design. Thanks to the clock-less serial readout with embedded PWM interface, the sensor delivers still images at maximum 1Kfps showing a dynamic range of at least 72 dB. A typical value of power consumption of the entire array is estimated about 35nW at 1.6V of power supply.File in questo prodotto:
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