In this work we present new developments of Silicon Drift Detectors (SDDs) of different sizes in view of their use in future Siddharta-2 experiments. The SIDDHARTA experiment used X-ray spectroscopy of the kaonic atoms to determine the transition yields and the strong interaction induced shift and width at the lowest experimentally accessible level. In this work we report about the SDDs development for the apparatus upgrade, with particular emphasis of X-ray measurements at cryogenic temperatures. The SDDs presented are designed as single unit with square shaped of different areas 64 mm2 (8 mm x 8 mm) or 144 mm2 (12 mm x 12 mm) and also as monolithic array of 9 elements (8 mm x 8 mm each, total area 26 mm x 26 mm) in a 3x3 format. The read-out of the SDDs is based on a CMOS preamplifier (CUBE) both for the single unit both for the 3x3 array. The array required in addition the use of an Application Specific Integrated Circuit (ASIC) and of a custom Data Acquisition System for the acquisition of all the units. The CMOS technology is intrinsically more robust at lower temperatures than the more conventional JFET transistor used in SDDs readout and it allows the use of these devices at cryogenic temperatures. For instance an energy resolution lower than 125 eV at the MnKa line has been obtained with a 64 mm2 at the temperature of 50 K and shaping time of 2 μs.

New Developments of SDD-Based X-Ray Detectors for the Siddharta-2 Experiment

Giacomini, Gabriele;Ficorella, Francesco;Picciotto, Antonino;Piemonte, Claudio
2013

Abstract

In this work we present new developments of Silicon Drift Detectors (SDDs) of different sizes in view of their use in future Siddharta-2 experiments. The SIDDHARTA experiment used X-ray spectroscopy of the kaonic atoms to determine the transition yields and the strong interaction induced shift and width at the lowest experimentally accessible level. In this work we report about the SDDs development for the apparatus upgrade, with particular emphasis of X-ray measurements at cryogenic temperatures. The SDDs presented are designed as single unit with square shaped of different areas 64 mm2 (8 mm x 8 mm) or 144 mm2 (12 mm x 12 mm) and also as monolithic array of 9 elements (8 mm x 8 mm each, total area 26 mm x 26 mm) in a 3x3 format. The read-out of the SDDs is based on a CMOS preamplifier (CUBE) both for the single unit both for the 3x3 array. The array required in addition the use of an Application Specific Integrated Circuit (ASIC) and of a custom Data Acquisition System for the acquisition of all the units. The CMOS technology is intrinsically more robust at lower temperatures than the more conventional JFET transistor used in SDDs readout and it allows the use of these devices at cryogenic temperatures. For instance an energy resolution lower than 125 eV at the MnKa line has been obtained with a 64 mm2 at the temperature of 50 K and shaping time of 2 μs.
978-1-4799-0533-1
978-1-4799-0534-8
978-1-4799-3423-2
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Utilizza questo identificativo per citare o creare un link a questo documento: http://hdl.handle.net/11582/207416
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