We report on the design of a CMOS image sensor, featuring a novel active pixel architecture which allows for a very high dynamic range by adapting the single pixel integration time to the local illumination conditions. Circuit simulations allowed the design approach to be validated and the electrical performance of the circuit to be predicted. A preliminary image sensor test-chip, consisting of a 128 x 64-pixel array, with column readout based on Correlated Double Sampling, Double Delta Sampling for Fixed Pattern Noise suppression, and digital control logic, has been designed and fabricated in a 0.35-um, 3.3-V CMOS technology
A test chip for a novel high-dynamic-range CMOS image sensor
Stoppa, David;Simoni, Andrea;Gottardi, Massimo;Dalla Betta, Gian Franco;Gonzo, Lorenzo
2001-01-01
Abstract
We report on the design of a CMOS image sensor, featuring a novel active pixel architecture which allows for a very high dynamic range by adapting the single pixel integration time to the local illumination conditions. Circuit simulations allowed the design approach to be validated and the electrical performance of the circuit to be predicted. A preliminary image sensor test-chip, consisting of a 128 x 64-pixel array, with column readout based on Correlated Double Sampling, Double Delta Sampling for Fixed Pattern Noise suppression, and digital control logic, has been designed and fabricated in a 0.35-um, 3.3-V CMOS technologyFile in questo prodotto:
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