It is being proved that the neurochip TOTEM is a viable solution for high quality and real time computational tasks in HEP, including event classification, triggering and signal processing. The architecture of the chip is based on a 'derivative free' algorithm called Reactive Tabu Search (RTS), highly performing even for low precision weights. ISA, VME or PCI boards integrate the chip as a coprocessor in a host computer. This paper presents: 1) the state of the art and the next evolution of the design of Totem; 2) its ability in Higgs search at LHC as an example

The Neurochip TOTEM: A Case Study in HEP

1997

Abstract

It is being proved that the neurochip TOTEM is a viable solution for high quality and real time computational tasks in HEP, including event classification, triggering and signal processing. The architecture of the chip is based on a 'derivative free' algorithm called Reactive Tabu Search (RTS), highly performing even for low precision weights. ISA, VME or PCI boards integrate the chip as a coprocessor in a host computer. This paper presents: 1) the state of the art and the next evolution of the design of Totem; 2) its ability in Higgs search at LHC as an example
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/11582/1372
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