The Italian silicon-detectors-with-low-interaction-with material collaboration (SLIM5) has designed, fabricated and tested several prototypes of CMOS monolithic active pixel sensors (MAPS). This paper shows the design of a new mixed-mode chip prototype composed of a bidimensional matrix of pixels, and of an off-pixel digital readout sparsification circuit. The readout logic is based on commercial standard cells and implements an optimized non token readout technique. Also, a MAPS emulator software toool is presented. The project is aimed at overcoming the readout speed limit of future large-matrix pixel detectors for particle tracking, by matching the requirements of future high-energy physics experiments. The readout architecture extends the flexibility of the MAPS devices to be also used in first level triggers on tracks in vertex detectors.
Proposal of a data sparsification unit for a mixed-mode MAPS detector
Ratti, Lodovico;Giacomini, Gabriele;Dalla Betta, Gian Franco;Soncini, Giovanni;Pancheri, Lucio;
2007-01-01
Abstract
The Italian silicon-detectors-with-low-interaction-with material collaboration (SLIM5) has designed, fabricated and tested several prototypes of CMOS monolithic active pixel sensors (MAPS). This paper shows the design of a new mixed-mode chip prototype composed of a bidimensional matrix of pixels, and of an off-pixel digital readout sparsification circuit. The readout logic is based on commercial standard cells and implements an optimized non token readout technique. Also, a MAPS emulator software toool is presented. The project is aimed at overcoming the readout speed limit of future large-matrix pixel detectors for particle tracking, by matching the requirements of future high-energy physics experiments. The readout architecture extends the flexibility of the MAPS devices to be also used in first level triggers on tracks in vertex detectors.I documenti in IRIS sono protetti da copyright e tutti i diritti sono riservati, salvo diversa indicazione.
