We report on JFET devices fabricated on high-resistivity silicon with a radiation detector technology. The problems affecting previous versions of these devices have been thoroughly investigated and solved by developing an improved fabrication process, which allows for asizeable enhancement in the JFET performance. In this paper, the main features of the fabrication technology are presented and selected results from the electrical and noise characterization of transistors are discussed.

An improved fabrication process for Si-detector-compatible JFETs

Piemonte, Claudio;Dalla Betta, Gian Franco;Boscardin, Maurizio;Gregori, Paolo;Zorzi, Nicola;Ratti, Lodovico
2006-01-01

Abstract

We report on JFET devices fabricated on high-resistivity silicon with a radiation detector technology. The problems affecting previous versions of these devices have been thoroughly investigated and solved by developing an improved fabrication process, which allows for asizeable enhancement in the JFET performance. In this paper, the main features of the fabrication technology are presented and selected results from the electrical and noise characterization of transistors are discussed.
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/11582/2934
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