The intrinsic gettering effect on our CCD/CMOS process has been evaluated by processing silicon wafers having 13.2 and 17.5 ppm of interstitial oxygen concentration, [Oi]. Electrical characterization in terms of both effective carrier generation lifetime in MOS structures and leakage current density of diodes, have shown a better electrical performances for sample having lower [Oi]. This has been related to the absence of surface stacking faults as verified after etching with Wright solution.

Intrinsic Gettering in a CCD/CMOS Process

Bellutti, Pierluigi;Boscardin, Maurizio;Soncini, Giovanni;Zen, Mario;Zorzi, Nicola
1994-01-01

Abstract

The intrinsic gettering effect on our CCD/CMOS process has been evaluated by processing silicon wafers having 13.2 and 17.5 ppm of interstitial oxygen concentration, [Oi]. Electrical characterization in terms of both effective carrier generation lifetime in MOS structures and leakage current density of diodes, have shown a better electrical performances for sample having lower [Oi]. This has been related to the absence of surface stacking faults as verified after etching with Wright solution.
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/11582/1034
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